Research

Dr.Hemanth Kumar A.R
Professor and coordinator for research studies
The Department of Electronics and Communication Engineering has been a recognized Research centre under VTU since the year 2012. The researchers can register for Ph.D programme in the domains of :-
• Wireless Communication
• Mobile Communication
• Wireless Communication Networks
• Antennas
• VLSI
• Signal Processing etc.

"Currently there are about 24 students are registered as PhD scholars under various domains.”

Name of the Researcher

Nature

Title of the Research work

Year of commencement of Research work

Status

Details of paper published in connection with the Research title

(i)

(ii)

Course work Completion

Comprehensive Viva-Voce

(i)

(ii)

(iii)

Research Guide

Research scholar

Sl. No.

Title of paper

Type

National /International

C Y Gopinath

Dr Hemanth Kumar A R

Part Time

LTE

2013

Completed

Completed

1

Performance Analysis of Different Scheduling Algorithmns in LTE system for Jitter conctraint, IJSRD, Volume 3, Issue 7, Sep 2015  

International

2

Performance Evaluation of Scheduling algorithm with Diferent MIMO techniques in LTE Systems, IJCST, Vol 6, Issue 3 Sept 2015 ISSN:0976-8491(online) ISSN:2229-4333(Print)Pg No 214-217.

International

R K Srinivas

Dr Hemanth Kumar A R

Part Time

LTE

2013

Completed

 

 

 

 

Vinay

Dr Hemanth Kumar A R

Part Time

Multimedia

2013

Completed

 

 

 

 

Hrishikesh Sasthy

Dr Hemanth Kumar A R

Part Time

Device to device communication in 5g technologies

2014

Yet to take Exam

 

 

 

 

Naveen Kumar S

Dr Hemanth Kumar A R

Part Time

Coding schemes for wireless networks

2015

Yet to take Exam

 

 

 

 

Kumara Swamy K V

Dr Vijaya Prakash A M

Part Time

Analysis on AC/ADC for the data conversion in LTE(4G) at 45nm Technology node an effect of Proces variation on the DAC/ADC performance

2014

Completed

Completed

1

Effects of process variation at deep Submicron Technology node and analysis of Sigma-Delta ADC design

 

 

 

 

Jalaja S

Dr Vijaya Prakash A M

Part Time

Design and Implementation of Low Power VLSI Architecture using Retiming approch

2014

Completed

Completed

1

High Speed VLSI Architecture for Squaring Algorithm Using Retiming Approach 978-0-7695-5033-6/13 © 2013 IEEE DOI 0.1109/ICACC.2013.53

International

2

Design of low power based VLSI architecture for constant multiplier and high speed implementation using retiming 2016 IEEE /DOI 10.1109/MicroCom.2016.7522503

International

3

Very Large Scale Integration Architecture of Finite Impulse Response Filter Implementation Using Retiming Technique- waset 2017

International(Best Presentation award)

Mali Tejashri Sadashiv

Dr Vijaya Prakash A M

Part Time

Optimization of Routing to Minimize wire Length and Channel width in VLSI Design Systems

2014

Yet to take Exam

 

 

 

 

S P Spurtinath

Dr Vijaya Prakash A M

Part Time

Synthesis and optimization of Digital Circuits using Energy Efficient Reversible Logic

2014

Yet to take Exam

 

 

 

 

Santosh Babu K.C

Dr Vijaya Prakash A M

Part Time

Performance analysis of Low Power Digital Logic Circuits Based on FINFET Technologies

2015

Yet to take Exam

 

 

 

 

Renuka Kajur

Dr K V Prasad

Part Time

 

2012

Completed

 

 

 

 

Santhosh G

Dr K V Prasad

Part Time

 

2015

Yet to take Exam

 

 

 

 

Nagesh R

Dr Sree Ranga Raju M N

Part Time

Optimization of Cooperation and Resource Coordination in Cooperative Wireless Networks

2012

Completed

Applied for Comprehensive VIVA

1

Optimized on-demand routing in cooperative wireless networks

International

2

Tuning the MAC Protocol Frame Work to Enhance Cooperative ranges in Cooperative Communication Networks

International

Naveen K.B

Dr Sree Ranga Raju M N

Part Time

Energy efficient vlsi architecture for digital communication sub systems using reversible logic

2012

Completed

Completed

1

Optimal Design of R-2R DAC using Reversible logic  IJARCSSE-ISSN 2277128X volume 5, Issue 5, May 2015

International Journal

2

Energy Efficient Architecture for 4-TAP FIR Filter using Reversible Logic Gates

International Journal

3

Energy Efficient QAM Modulation/Demodulation Architecture using Reversible Logic Gates

International Journal

4

LOW POWER DIGITAL ADC ARCHITECTURE USING REVERSIBLE LOGIC GATESIN 65nm TECHNOLOGY

International Journal

5

ENERGY EFFICIENT ARCHITECTURES FOR QPSK MODULATION/DEMODULATION USING REVERSIBLE LOGIC GATES IN 65nm

International Journal (Applied to Elsevier Micro Electronics Journal)

Harish

Dr Sree Ranga Raju M N

Part Time

Underwater acoustic communications

2014

 

 

1

Design and performance Evaluation of Error Detection and Correction using Concatenated BCH and LDPC coding scheme for data streams in satellite communications. IJERT, Volume 4, Issue 08,Aug 2015 eISSN -2278-0181

 

HAREESH KUMAR

Dr Sree Ranga Raju M N

Part Time

Design and Implementation of Wireless Sensor Networks for Underwater Acoustics Using Software Defined Radio

2014

 

 

 

 

 

Ramakrishna KT

Dr M N Sree Ranga Raju

Part Time

Anomaly Detection of Streaming Sensor Data Using Spark MLlib Techniques

2015

 

 

 

 

 

Basavaraj S

Dr. C R Byra Reddy

Part Time

Sensor Networks

2013

 

 

 

 

 

Rajesh L

Dr. C R Byra Reddy

Part Time

Sensor Networks

2013

 

 

1

A Review on MAC protocols for WSN's, International Journal of Computer Applications and IOT, Vol.1,no. 2, 2015/12

 

Vandhana A R

Dr. C R Byra Reddy

Part Time

Rader Systems

2013

 

 

1

Enhancement of unambiguous DOA estimation for phase comparison monpulse radar, ICACCI 2015, IEEE Conference, Kochi

 

Keshava

Dr. C R Byra Reddy

Full Time

OFDM

2014

 

 

 

 

 

Depthi

Dr. C R Byra Reddy

Part Time

Antens

2015

 

 

 

 

 

Anand M

Dr A B Kalpana

Part Time

Design, Simulation and analysis of MIMO-OFDM RF Transceiver for Wireless LAN Systems

2015

 

 

1

Design and analysis of Class-E Power amplifier for Wireless LAN application

Springer Conference

 

 

2

Design of High gain Low power down conversion Mixer used for Wireless LAN applications

International conference

Deepthi Raj

Dr A B Kalpana

Part Time

Synthesis Optimization of FSM for Area and Power using Computational Intelligence

2015

 

 

 

 

 

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