Post Graduate

The department of Electronics and Communication offers two post graduate programs- M.Tech in VLSI Design and Embedded systems, it was started during the year 2008 with the intake of 18 and M.Tech in Digital Electronics and communication was started during the year 2012 with an intake of 24. The PG programs are approved by AICTE and affiliated to Visvesvaraya Technological University (VTU), Karnataka. The department has well qualified staff members. The students will be encouraged and motivated to learn the art of effective dissemination of knowledge through seminars and technical paper publications. They are even trained to carryout good project work, so that in future, they are enabled to shoulder the responsibility of performing, managing any project efficiently. The department is having research and development Centre to carryout research works to acquire Ph.D degree and to do the industrial Projects. Dr. Vijaya Prakash A. Currently coordinating the Post-graduation department, professor has a rich experience of teaching and research for more than 20 years. He has published good research papers in the leading international journals and conference proceedings.

Dr. Vijaya Prakash A.M

Professor and coordinator for PG studies

MTech. (VLSI Design and Embedded systems)

The semiconductor technology especially the VLSI Chip design has been developing at a very fast rate and today it has reached nanometer scale. The miniaturization and 3 D devices have enabled placing over one billion gates on a chip. This is drastically reduced the integrated circuit overall size and speed has tremendously increased. Advances in VLSI have resulted in a compact, highly reliable and fast electronics systems. The advances in VLSI have moved from integrated circuits to System on Chip. The designers have a very big challenge to design such a chip in highly competitive market. There is need to produce quality engineers who will be able to create new chip ideas, design new VLSI chips and also embedded systems.

The program curriculum is aimed to design and development of VLSI chips in both front end & Back end designs, verification and testing. The course also offers strong knowledge and practical skills in developing embedded solutions on varied platforms such as FPGA, Advanced microcontrollers and processors. They learn to implement real time embedded systems. The designers gain practical knowledge through mini and major projects in both VLSI and Embedded system design domains.

Students also have access to advanced design suites such as Cadence, FPGA design suite, System Generator and several embedded design kits. The students are encouraged to participate in various sponsored projects in the College to carry out project work and to do the good publications.

Career Opportunities:

The students after completing this course have opportunity to work in companies working in the field of VLSI chip design such as Intel, Texas Instruments, , Infineon, TCS, AMD, Alliance semiconductors, Wipro, ARM and many more offer internship and placement opportunities. There are a host of embedded solutions companies offering excellent job opportunities, to name a few Tech Mahindra, Robert Bosch, I-micro, redpine signals etc.

Core Subjects Electives List
Semester I
Advanced Mathematics
Digital VLSI Design
Advanced Embedded Systems
VLSI Process Technology
Elective - 1
VLSI Design and Embedded System Lab -1
Seminar I
Elective - 1
Digital System Design using Verilog
ASIC Design
VLSI Design Automation
System Verilog
Nanoelectronics
Semester II
Design of Analog and Mixed mode VLSI
Circuits
Low Power VLSI Design
VLSI Testing and Verification
Real Time Operating Systems
Elective-2
VLSI Design and Embedded System Lab -2
Seminar II
Elective - 2
VLSI for signal processing
CMOS RF Circuit Design
High Speed VLSI Design
SOC Design
MEMS
Semester III

Seminar / Presentation on Internship (After 8 weeks from the date of commencement)
Report on Internship
Evaluation and Viva-voce

Semester IV

Synthesis and Optimization of Digital Circuits
Elective-3
Evaluation of Project Phase-I
Evaluation of Project Phase-II
Evaluation of Project Work and Viva-voce

Elective-3
Advances in VLSI Design
Advanced Computer Architecture
Image and Video Processing
Reconfigurable Computing
Modern DSP

MTech (Digital Electronics and Communication)

The M Tech in Digital Electronics and Communication covers study of design and analysis in the following subjects: Digital communications, Error control coding, RF circuits, Wireless standards, network on chips, MMC, Antenna Design , Advanced Signal Processing ,Sensor networks, Digital systems using CMOS, Satellite networks, etc.

Career Opportunities:

The potential career opportunities for candidates completing M Tech in Digital Electronics and Communication range from being an entrepreneur, researcher and design engineer in the core and IT industries and research institutes where product / service development is happening. The areas of work are in automotive communications, intelligent transport communication equipment’s, switches and router development, aerospace communication, wireless security, short range communications with medical instrumentation, wireless sensor communications design and development, mobile app development, etc.

Core Subjects Electives List
Semester I
Advanced Mathematics
Antenna Theory and Design
Probability and Random Process
Advanced Digital Communication
Elective - 1
DEC Lab -1
Seminar I
Elective - 1
Wireless and Mobile Networks
CMOS VLSI Design
Automotive electronics
Simulation, Modeling, and Analysis
Nanoelectronics
Semester II
Wireless Communication
RF and Microwave circuit design
Modern DSP
Optical Communication and Networking
Elective-2
DEC Lab -2
Seminar II
Elective - 2
Broadband Wireless networks
Multimedia Communication
ASIC design
Spread Spectrum Communication
Advanced Embedded system
Semester III

Seminar / Presentation on Internship (After 8 weeks from the date of commencement)
Report on Internship
Evaluation and Viva-voce

Semester IV

Error control coding
Elective-3
Evaluation of Project Phase-I
Evaluation of Project Phase-II
Evaluation of Project Work and Viva-voce

Elective-3
RF MEMS
Communication System design using DSP algorithm
Advanced Computer Networks
Advanced Radar systems

Publication:

Name of Faculty Title of paper Publication Citation Year of Publication
Dr.K.V Prasad Implementation of DDFS using Generalised Microrotation Using CORDIC Algorithm International Journal of Embedded and software computing (IJESC) 2014
Design and Implementation of Low power DFS using FPGA National Conference on Recent Trends in Electronics and Communication – NCRTEC-2013 2013
Dr. M. N. SreeRangaRaju A 2.4 GHz Reference-less receiver for QPSK Demodulation International Journal of Scientific and Research Publications 2014
Performance Evaluation of Efficient Scheduling Algorithms for Achieving Optimal Flow Delay and to Enhance Throughput in Multichannel Wireless Networks International Journal of Engineering Research & Technology (IJERT) 2015
Dr. Hemanth Kumar A R Design and Implementation of Vedic Multiplier using Compressors International Journal of Engineering Research & Technology (IJERT) 2015
Efficient Algorithm for Resource Allocation with Carrier Aggregation in downlink LTE-A Networks International Journal of Engineering Trends and Technology (IJETT) 2015
Geo-Registration of Aerial image using NCC and RANSAC Algorithm Advance research in Electronic and Communication, RLJIT 2014
Geo-Registration of Aerial image using RANSAC Algorithm Advance research in Electronic and Communication, Vemana Institute of Technology 2014
Dr Vijaya Prakash A.M VLSI Implementation of Intra pre diction algorithms in HEVC decoder International Multi Conference on Innovations in Engineering and Technology at Bangalore, India. 2014
Low Power Synthesis and Function al Verification of Vending Machine International Conference on Information & Communication Engineering 2013
Adaptive Approach towards Effect of Proc proceess Variations Applicable to Digital and and Analog Circuits International Co nference on Information & Communication Engineering (ICICE-2013) at Bangalore,India. 2013
Dr. C.R. Byrareddy Implementation of core lock mechanism as a data synchronization International Journal Of Innovative Technology And Research.(IJITR) 2014
Method in Embedded Multi-core Systems International Journal of Science and Research (IJSR) 2014
Dr A B Kalpana Design and Implementation of Optimized Dual Port Register File Bit Cell International Journal of Scientific and Research Publications 2013
Low power 8,16 and 32 bit ALU Design using clock gating International Journal of Scientific & Engg Research 2015
C.Y Gopinath Verification of I2C master core using system Verilog -UVM International Journal of Science an research 2014
K Nirmala Kumari Design and Implementation of LDPC Decoder Using Time Domain-AMS Processing International Journal of Applied Research 2015
Driver Drowiness Detection and Alert System National Conference on Technological advances in Electronic System Design 2014
Functional Verification of USB 3.0 Controller using UVM Methodolgy National Conference on Communication and Image Processing-2013 (NCCIP-13) 2013
R.K.Karunavathi Geographic routing approach for load balancing in WSN IJERT 2015
Link initialization & training in Mac layer of PCIe3.0 IJCSIT ISSN 2717-2719 2015
Secured High throughput implementation of AES Algorithm IJARCSSE - V3I5-0471 2013
Extraction & Enhancement of cancer cells from MRI colorectal image IJSR ISSN 2319-7064 2014
Design and Implementation of AES algorithm in UART for secured data transmission International conference on Information and communication Engineering, organized by Dr AIT 2013
B.L Radha Implementation of reliable shared buffer router for on chip networks IJESC ISSN 2250 – 1371 Vol 2.14 2014
H S Veena An efficient VLSI Implementation lossless ECG Encoder design IJSR 2014
J.C Narayana Swamy Novel approach to range ex-tension of RFID IJATE 2014
Narendra C P Sum of absolute difference of an image IJCA 2014
Efficient DSP architecture IEEE Conference 2014
MAC architecture for DSP application IEEE Conference 2014
S.Muralinarasimham An effiecient hih speed convolution encoder and vitebi decoder IJSR Vol 3 Issue 6, June 14 2014
Jalaja S ASIC Architectures for Implementing ECC Arithmetic over Finite Fields International Journal of Science and Research (IJSR 2015

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